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High-Performance RISC-V Processor for Computation Acceleration and Server w/ Wei-han Lien
Our Chief CPU Architect Wei-han Lien introduces Ascalon at the RISC-V International Summit.
"Introducing Tenstorrent's high performance #riscv processor Ascalon, the disruptive high-performance processor for AI and server with the best performance and power efficiency."
Our Chief CPU Architect Wei-han Lien introduces Ascalon at the RISC-V International Summit last month.
Announcements
Newsroom
Stealthium and Tenstorrent Partner to Deliver Runtime Observability for AI Infrastructure
Jul 30, 2026
Newsroom
Announcements
Tenstorrent Sets New Performance Records, Launches TT- Ascalon S, and Expands Across Japan
Jun 30, 2026
TT in the News
Jim Keller: ‘AI Still Obeys the Old Laws of Compute’
Jun 25, 2026